We are responsible for developing the platform interconnect design guidelines for State-of-the-art server platforms that support the latest processors and other server products. In this position, you will be working with a team of Signal Integrity Engineers and will be developing interconnect interface solutions.**Your scope of responsibilities will include but are not limited to**:- Engaging with silicon designers' platform, designers' package, designers electrical, validation teams and external customer support teams performing modeling and simulation of highspeed IO (Input-Output) interconnect channels.- Developing package and platform design guidelines.- Defining and evaluating circuit design features required to support interconnect performance requirements creating signal measurement test plans and reviewing measurement results.- Correlating measurements to simulations.- Supporting signal integrity tool and methodology development.**Behavioral traits**:- Team player skills and willingness to learn.- Advanced English communication skills.**Qualifications**:** Minimum Qualifications,**You must possess the below minimum qualifications to be initially considered for this position:- Intermediate to advanced English level.**Preferred Qualifications,**- Signal Integrity experience supporting high-speed/low-speed signals and memory interfaces such as PCIe Ethernet DDR.- Fundamental knowledge of transmission line theory and high-speed/low-speed Printed Circuit Boards (PCB) design.- Experience with EDA Tools Mentor Graphics Cadence etc.- Experience with simulation tools MATLAB, HSpice, and ADS.- Knowledge of Intel Architecture.- Design of Experiments (DOE) and statistical knowledge and experience would be an added advantage.- Transmission line modeling using Field Solvers Ansoft 2D HFSS, Q3D, and CST electromagnetic simulator.- Lab equipment such as TDR VNA digital oscilloscopes and logic analyzers.- Experience with silicon devices modeling methods such as IBISAMI or Verilog A.- PCB layout process and methodology.- Experience using scripting languages (e.g. Python, PERL, etc.).- Board-level system architecture basic silicon design IO structures and topologies.- Understanding of electromagnetic concepts.Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.**Inside this Business Group**:The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.**Posting Statement**:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.**Benefits**:**Working Model**:This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.**In certain circumstances the work model may change to accommodate business needs.**JobTypeHybrid
