Job DescriptionJoin the CAD team at Qualcomm and advance the industry state of the art for DFT. Support the company-wide deployment of flows architected to enable leading process nodes. Work closely with cross-functional teams from design, production test and yield analysis.ResponsibilitiesWill be part of DFTCAD automation team, developing methodology and flows to support end-2-end DFT/DFX solution, and provide support and trainingCollaborate with SoC design, product and test engineer teams to drive standardization of DFT/ATPG methodology and flow across the company.Work closely with multiple EDA tool vendors to resolve day-2-day issues, help to drive vendor solutionCollect and evaluate requirements with consideration of improving design flow efficiency, test quality and lower test cost to improve DFT flow and methodologyQualifications3+ years of experience in DFT/DFD/DFX, MS or PhD degree in EE or related field, or equivalent experienceCore DFT skills for this position include: scan insertion, Memory BIST implementation, JTAG/IJTAG, at-speed test, ATPG, fault simulation, silicon diagnostic, scan compression, IDL/PDL, SSN, SEQ, Core-based test methodology and IO wrapping, pattern retargetingExperience developing automation for DFT flow and architecting the DFT methodologyStrong coding experience with hands on experience using TCL, Python/Perl, Scripting, and strong analytical debug and problem-solving skillsGood exposure with industrial DFT tools including Siemens, Synopsys or equivalentDeep understanding of SoC design, low power, timing exceptions and complex clock structuresStrong analytical and debugging experience for ATPG DRC, product manufacturing pattern failures and Design for Debug concept and implementationExcellent team spirit, strong ownership and openness, highly motivated#J-18808-Ljbffr