Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.We are seeking a highly skilled DRAM Design Engineer to join our team and contribute to the development of new memory products by assisting with the overall design, layout, and optimization of memory circuits.The ideal candidate will have a strong understanding of memory circuit design, including the ability to interpret device specifications to produce required functionality, participate in new circuit conception and schematic design, and perform circuit simulations using standard industry simulators.In this role, you will work closely with process integration to set model performance targets, responsible for reliability verification, oversee and manage layout, manage floor-planning process, including placement and routing optimization, assist in standard cell development, optimize design rules for cost, performance, and functionality, and define array blocks and pitch cells.You will also be responsible for managing verification processes, performing silicon versus schematic versus layout verification on required circuits, responsible for simulation, Verilog, and parasitic modeling, and assist in silicon design validation, reticule experiments, and tape-out revisions as needed.Additionally, you will maintain technical expertise and provide training, communicate best known practices to the entire department, prepare detailed documentation as required, contribute and participate in global design forums, participate in continuing education and competitor analysis, and participate in recruiting and interviewing of new candidates.The successful candidate will have excellent communication and project management skills, with the ability to work effectively in a team environment and manage multiple projects simultaneously.Responsibilities include, but are not limited to:Contribute to the development of new memory products by assisting with the overall design, layout, and optimization of memory circuits.Work closely with process integration to set model performance targets.Responsible for reliability verification.Oversee and manage layout, including floor-planning process, placement and routing optimization, standard cell development, and design rule optimization.Define array blocks and pitch cells, verify proper word line and digit line lengths, and choose transistor sizes and types for pitch cells.Manage verification processes, including silicon versus schematic versus layout verification, simulation, Verilog, and parasitic modeling.Assist in silicon design validation, reticule experiments, and tape-out revisions as needed.Maintain technical expertise and provide training, communicate best known practices to the entire department, prepare detailed documentation as required, contribute and participate in global design forums, participate in continuing education and competitor analysis, and participate in recruiting and interviewing of new candidates.Requirements include:Strong understanding of memory circuit design, including device specifications, new circuit conception, schematic design, and circuit simulations.Ability to work closely with process integration to set model performance targets.Excellent communication and project management skills.Ability to work effectively in a team environment and manage multiple projects simultaneously.We are an equal opportunities employer and welcome applications from all qualified candidates.