Dram Design Senior Layout Engineer

Transforming Information, Enriching LifeMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence.We are looking for an IP Layout Engineer to join our DRAM and Emerging Memory Group (DEG) at Micron Technology, Inc..Key Responsibilities:Design and development of IP layouts used in DRAM chips.Layout verification, quality check, and documentation.On-time delivery of block-level layouts with acceptable quality.Leadership skills in planning, area/time estimation, scheduling, delegation, and execution.Guiding junior team-members in their execution of Sub-block-level layouts & review of their work.Requirements:5+ years of experience in layout designs in advanced CMOS process.Expertise in layout area and routing optimization, design rules, yield, and reliability issues.Good understanding of layout fundamentals, including Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.Adequate knowledge of schematics, interface with circuit designer, and CAD team.Understanding of layout effects on the circuit, such as speed, capacitance, power, and area, etc.Education:BE/BTech or MTech in Electronic/VLSI Engineering or equivalent; we will also consider exceptionally talented Diploma holders in electronic or VLSI engineering.Salary: $120,000 - $180,000 per yearThis role requires strong leadership skills, excellent problem-solving abilities, and a passion for innovation.
If you are motivated to grow in both technical and managerial breadth, we encourage you to apply.