Transforming the Future of Information with Innovative Memory SolutionsMicron Technology, a world leader in memory and storage innovations, is seeking a skilled Layout Designer to join our DEG (DRAM Engineering Group) Design Methodology team. As a Layout Designer, you will play a vital role in creating innovative layouts that drive cutting-edge memory solutions for our Commodity, Mobile, and Emerging R&D Design, Process, and Product Engineering customers.Key Responsibilities:Collaborate with Design customers to plan and document layouts that meet Design and Process customer specifications.Verify layout quality using DRC, LVS, and other verification tools to ensure compliance with Design Rules.Apply knowledge of CMOS process in collaboration with Process customers to optimize layout designs.Develop and document layout tools and methodologies to enhance quality and efficiency.Identify and address issues through effective communication and problem-solving skills.Lead sections of the layout design, coordinating with local and global teams to ensure quality and delivery.Requirements and Qualifications:5+ years of experience in custom layout with advanced CMOS process.Expertise in layout area and routing optimization, design rules, yield, and reliability issues.Good understanding of layout fundamentals, including Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.Adequate knowledge of CMOS circuits/schematics, interface with circuit designer and CAD team.Understanding of layout effects on the circuit, such as speed, capacitance, power, and area.Excellent problem-solving skills in solving area, power, performance, and physical verification of custom layout.Experience with Cadence tools, including Virtuoso schematic editor, Virtuoso layout L, XL & Verification tools like Mentor Calibre.Leadership qualities and ability to multitask.Ability to work in a team environment and provide technical support to fellow team members.Self-motivated, hardworking, goal-oriented, and excellent verbal and written communication skills.Knowledge of coding and layout automation is a plus.Preferred Qualifications:Experience in Synopsys IC Compiler II or Cadence Innovus.Education:BS or MS in Electronic/VLSI Engineering or equivalent.