Transforming the World with Information TechnologyMicron Technology is a global leader in memory and storage solutions that accelerate information transformation into intelligence, enabling faster learning, communication, and progress.About Our Opportunity:We've been innovating for over 43 years, pushing the boundaries of memory and semiconductor technologies to transform how the world uses information.
As a diverse international team of visionaries and scientists, we're developing groundbreaking technologies that enrich life.As a DRAM Engineering Group Methodology (DEGDT) Layout Designer at Micron Technology, you will translate schematics into layout used for fabrication reticules.
You'll meet engineering and process criteria for assigned Dram products, organize logistics, prioritize tasks, and develop methodologies for issue resolution.
In this role, you'll work with Design and other engineering groups to apply multiple layout techniques for digital and analog circuits.You'll understand circuit design protocols, fab processes, mask generation techniques, and tapeout processes and procedures.
Our inclusive environment offers a creative career path with collaborative teams worldwide, enabling your imagination and creativity to grow.About the Role:Design and Verify Analog and Digital Layout at All Levels.Use Computer-Aided Design Software (i.e., Cadence, Calibre).Work with Design Engineers to Floor Plan and Design Layout.Understand and Follow Verification Protocols.Apply Custom and Automated Layout Techniques.Develop and Maintain Technical Knowledge.Interface with Design Engineering to Understand Layout Methodology.Possess Basic Understanding of Circuit Design.Understand Tape Out Processes and Procedures.Apply Fab Process Knowledge, Including DFM and OPC.Manage Project-Based Environment and Prioritize Tasks.Proactively Develop Methodologies to Resolve Issues.Requirements:2+ Years of Experience in Layout Designs in CMOS Process.Good Understanding of Layout Fundamentals, including Electro-migration, Latch-up, Coupling, Crosstalk, IR-drop, Parasitic Analysis, Matching, Shielding, etc.Knowledge of Schematics and Interface with Circuit Designer and CAD Team.Problem-Solving Skills in Solving Area, Power, Performance, and Physical Verification of Custom Layout.Knowledge of Cadence Tools, Including Virtuoso Schematic Editor, Virtuoso Layout L, XL & Other Verification Tools Like Mentor Calibre.Able to Work in a Team Environment and Provide Technical Support to Fellow Team Members.Education:BE/BTech or MTech in Electronic/VLSI Engineering or Equivalent; Exceptionally Talented Diploma Holders in Electronic or VLSI Engineering are Also Considered.Micron Prohibits Child Labor and Complies with All Applicable Laws, Rules, Regulations, and International Industry Labor Standards.
We Do Not Charge Candidates Any Recruitment Fees or Unlawfully Collect Payment as Consideration for Employment.