At Micron, we are dedicated to innovating memory and storage solutions that accelerate the transformation of information into intelligence. As a Senior Manager of Memory CAD Guadalajara, you will play a crucial role in leading our team to drive close collaboration with DRAM design, layout, and verification methodology teams.The ideal candidate for this position has a strong background in mixed-signal, custom IC design flows, preferably with experience in memory design (DDR3/4/5, LP3/4/5, HBM, NAND). You should be familiar with CMOS circuit design, layout, and verification, as well as have experience supporting these areas.We offer a competitive salary range of $180,000-$220,000 per year, depending on your qualifications and experience. Additionally, you will receive a comprehensive benefits package, including medical, dental, and vision plans, paid time-off, and opportunities for professional growth and development.This is a unique opportunity to work with a world leader in the semiconductor industry, driving innovation and excellence in every aspect of our business. If you are a motivated and experienced professional looking to take your career to the next level, we encourage you to apply for this exciting role.Responsibilities:Lead the day-to-day support of CAD tools, flows, and collateral provided by functionally organized CAD teams worldwide to DRAM design teams at the Guadalajara DEG Design Center.Drive close collaboration with DRAM design, layout, and verification methodology teams to propose and co-develop capabilities outstanding or under-supported by EDA vendors.Establish and grow university relationships in the local and regional Guadalajara area to foster partnered research and development in design automation tools with an emphasis on data science and machine learning applications to EDA.Qualifications:Bachelor's degree in Computer Engineering, Computer Science, or Electrical Engineering.(15-20) + years of direct CAD or Design experience in mixed-signal, custom IC design flows.Experience leading highly technical IC Design or CAD teams distributed worldwide.Familiarity with memory design preferred (DDR3/4/5, LP3/4/5, HBM, NAND).