Physical Design Engineer

Job Detail:- Open to relocation to Dallas, TXQualifications- **Mastery of layout and verification tools and methodologies for RF/**Analog/Mixed Signal ICs**:- Mastery in **Cadence layout (Virtuoso XL)** and **Calibre **verification (ERC, DRC, LVS) required- **Able to contribute quickly in a team environment**:- **Strong communication, debugging and analytical skills with complex technical concepts**:- Experience in DFM hierarchical layout construction for efficient verification and integration- Comprehensive understanding of the target process to balance layout and design needs, e.G.
cross-talk, RC delay, electro-migration, IR drop, self-heating, shielding, matching, guard ring, LOD, WPE and latch-up.- Experience in Analog Layout single digit FinFET technologies (preferred, but not required)Responsibilities- Deliver on project assignments with integrity, commitment, and excellence- Efficiently layout sensitive Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications- Identify quality and reliability improvements in IC circuit and layout design- Support or perform design verification from sub-block up through top-level- Collaborate effectively with local and remote team members- Proactively look for continuous improvement opportunities in the flow, layout and design methodologiesBenefits- Competitive Compensation Packages- Medical Insurance- Dental/Vision Insurance- Company Paid Life Insurance- PTO and Holiday Pay- 401K Investment Options with Company Match- Performance Based Bonus Programs** IC Enable is currently not requiring COVID-19 VaccinationsIC Enable is an Equal Opportunity Employer