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**Must have**:
- Bachelor's degree in electrical engineering, computer engineering or related field
- 1+ years of relevant experience in board design and board design processes
- Intermediate to advanced English level
**Good to have**:
- 3+ years of experience working with industrial CAD toolset for Printed Circuit Boards (PCB) design such as Cadence
- 3+ years of experience in translating customer and/or product requirements into platform definition and into low level board implementation details (partitioning, place and route constraints, schematics, power distribution, thermo-mechanicals, and others)
- Knowledge of high-speed microprocessor-based Printed Circuit Boards (PCB) system design with FPGA and/or CPLD and/or ASIC and Intel microprocessor and chipset system architecture
- Familiarity with lab equipment including, but not limited to, DMM, High Speed Signal Analysis tools, logic analyzer interfaces, oscilloscopes, and soldering equipment
- Experience with digital board design, signal integrity, EMI design issues, Cadence or Mentor Graphics schematic capture tools, Cadence Allegro and Constraint Manager tools, and/or experience in determining root cause of challenging technical issues
- Relevant design experience with SI simulations using Ansys HFSS, SPICE, Cadence PetroQuest
- Knowledge of Windows and UNIX platforms, Python
- Strong digital design knowledge of buses and interfaces such as PCIe, USB, DDR and FSB
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- In this position, you will be responsible for the design and development of complex printed circuit boards and/or subsystems for Intel architecture server platforms for validation of enterprise processors and chipset.
**Your responsibilities will include but not be limited to**:
- Performing system simulation for timing and signal integrity and system debug with logic analyzers and scopes.
- Schematic capture of complex high-speed multilayer circuit boards and generation of all output materials required for board layout.
- Analyzing system timing and signal integrity.
- Documenting routing rules.
- Working with PCB layout designers for layout and checking board files for correctness.
- Performing system debug and verification.
- Participating on technical meetings to resolve complex multi-disciplinary issues in system design and produce detailed technical documentations including Platform User Guide.
- Responsible for multi-site collaboration with other board designers, PCB layout designers, signal integrity engineers, board fabricators and Intel validation teams.
- Interfacing with customers to resolve issues.
- Advanced English communications and problem-solving skills.
- Must be a self-starter willing to working with mínimal supervision in a team environment, multitask efficiently, and work well with a multi-site team.
**Qualifications**:
**Minimum qualifications,**
you must possess the below minimum qualifications to be initially considered for this position:
- Bachelor's degree in electrical engineering, computer engineering or related field.
- 1+ years of relevant experience in board design and board design processes.
- Intermediate to advanced English level.
- The position is in Mexico, it is not eligible for employment-based visa/immigration sponsorship.
- Must have unrestricted - permanent right to work in Mexico.
**Preferred qualifications,**
- 3+ years of experience working with industrial CAD toolset for Printed Circuit Boards (PCB) design such as Cadence.
- 3+ years of experience in translating customer and/or product requirements into platform definition and into low level board implementation details (partitioning, place and route constraints, schematics, power distribution, thermo-mechanicals, and others).
- Knowledge of high-speed microprocessor-based Printed Circuit Boards (PCB) system design with FPGA and/or CPLD and/or ASIC and Intel microprocessor and chipset system architecture.
- Familiarity with lab equipment including, but not limited to, DMM, High Speed Signal Analysis tools, logic analyzer interfaces, oscilloscopes, and soldering equipment.
- Experience with digital board design, signal integrity, EMI design issues, Cadence or Mentor Graphics schematic capture tools, Cadence Allegro and Constraint Manager tools, and/or experience in determining root cause of challenging technical issues is preferred.
- Relevant design experience with SI simulations using Ansys HFSS, SPICE, Cadence PetroQuest would be an added advantage.
- Knowledge of Windows and UNIX platforms, Python would be an added advantage.
- Strong digital design knowledge of buses and interfaces such as PCIe, USB, DDR and FSB.
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