Experis, ManpowerGroup, is hiring for AI enablers for Micron's new product development facility in Guadalajara, Mexico, focused on providing Micron's memory solutions and information technology operations. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever.
As a Design Verification Engineer for Micron, you will work with a highly innovative and motivated design and verification team using groundbreaking memory technologies to develop the most advanced DRAM and Emerging memory products.
Responsibilities:
- Design and verify high-density memory chips with complicated functionality, ultra-high speed, advanced low power, and power management technology.
- Understand the design to fully evaluate functionality at chip or block level and provide solutions.
- Work closely with Micron's global design teams to contribute to the success of the design team by applying verification tools and techniques, providing verification status and summaries to specific designs as needed.
- Participate in developing digital/analog mixed-signal verification methodology for advanced DRAM products, as well as design and implementation of mixed-signal design verification environment.
As a Senior Design Verification Engineer, you will be responsible for:
- Fully understanding the design datasheet.
- Studying and learning the circuit design in detail. Understanding the functionality and timing requirements of the circuitry.
- Developing patterns and regressions to increase function coverage for all DRAM architectures and features.
- Providing support to design engineers, debugging failures, leading bug tracking, and closing coverage.
- Collaborating with international colleagues on developing new verification tools and flows to solve verification difficulties.
- Owning and leading design projects and mentoring junior engineers.
- Developing and maintaining test benches and test vectors using digital and analog simulation tools.
- Creating verification plans from functionality specifications in coordination with architects.
- Working with cross-functional groups to define and develop DFT patterns.
Successful candidates will have:
- Basic understanding of CMOS circuit design.
- Experience in mixed-signal verification.
- Familiarity with analog/digital simulation tools, e.g., HSPICE, VerilogHDL, FINESIM.
- Knowledge and experience in verification languages (System Verilog or equivalent) and methodologies (UVM or equivalent) and other scripting languages (Python, Perl, etc.).
- Good debugging and problem-solving skills.
- Strong communication skills with the ability to convey sophisticated technical concepts to other verification peers.
- Good communication skills and ability to work well in a team.
- Experience with SystemVerilog Assertion (SVA).
- A strong leadership skill and attitude.
- BS or MS (preferred) in Electrical Engineering, Computer Engineering, or equivalent.
- Experience in leading small or large projects preferred.
Interested candidates should send their CVs through this channel.
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