ResponsibilitiesDesign, develop, debug system/IP validation framework to be used in bare-metal and light-weight-rtos environment for SoC validationUnderstand the SoC architecture, new features and prepare test planDevelop/port/enhance system validation content based on system level use cases, low power use cases, find HW bugs and root cause themInterface with Design/Software teams for test plan and debugsInterface with various IP validation team and cross functional teams(Design/SW) for test plan creation and debug complex issuesUse silicon debug hooks to measure power/performance/coverage and other KPI metricsMandatory Skills:Good knowledge and understanding of Embedded SW architecture and development in C, C++, AssemblyC language expertise for low level programming at the hardware-software boundary, assembly language for any processor, C-assembly interworkingGood knowledge of ARMv8/ARMv9/x86/RISC-V CPU architecture, Interrupt handling, Cache coherency, IO CoherencyGood knowledge of SoC architecture having Multicore/Multiprocessor with SMP/heterogenous coresKnowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies/locking mechanism, Virtual memory/MMU/paging etcUnderstanding of memory management, weakly ordered memory model/pipelining of memory systems/memory barriersIn-depth understanding of software build toolchains comprising of compilers, Makefiles, linker/scatter filesCompilers/linkers: Proficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM, Experience in optimizing code and resolving linker issues to ensure efficient and error free buildsExperience in using JTAG interfaces and tools for debugging HWScripting languages such as Python, shell scripting etc.Software engineering best practices: Conduct thorough and constructive code reviews, static analysis tools to maintain code quality, ensure best practices and identify areas of improvements and produce consistently clean code#J-18808-Ljbffr