Sr Eng-Deg Design Method-Layout

Detalles de la oferta

Micron Technology is seeking a skilled and motivated Layout Designer to join our DEG (DRAM Engineering Group) Design Methodology group.

As a Layout Designer, you will play a vital role in creating innovative layouts to support our Commodity, Mobile, and Emerging R&D Design, Process, and Product Engineering customers.

You will have the opportunity to showcase your expertise in CMOS device physics and electrical characteristics through your exceptional designs, and opportunity to work on mask generation and reticle design.

Responsibilities: Plan and document the layout in collaboration with Design customers, ensuring it meets Design and Process customer specifications. Verify layout quality using DRC, LVS, and other verification tools, both vendor-supplied and in-house. Interpret and apply Design Rules, ensuring they are checking as intended, and apply knowledge of CMOS process in collaboration with Process customers. Develop and document layout tools and methodologies to enhance quality, either through CAD or coding efforts. Identify issues and provide innovative solutions through effective communication. Lead sections of the layout design, coordinating with local and global teams to ensure quality for Design and Process customers. Qualifications & Skills: Must have 5+ years of experience in custom layout with advanced CMOS process. Should have expertise in layout area and routing optimization, design rules, yield and reliability issues. Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc. Should have adequate knowledge of CMOS circuits/schematics, interface with circuit designer and CAD team. Understanding layout effects on the circuit such as speed, capacitance, power and area. Excellent problem-solving skills in solving area, power, performance, and physical verification of custom layout. Experience with Cadence tools including Virtuoso schematic editor, Virtuoso layout L, XL & Verification tools like Mentor Calibre. Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques. Should have leadership qualities and able to do multi-tasking as required. Should be able to work in a team environment and provide technical support to fellow team members. Self-motivated, hardworking, goal-oriented and excellent verbal and written communication skills. Knowledge of Skill coding and layout automation is a plus. Preferred Qualifications: Experience in Synopsys IC Compiler II or Cadence Innovus.

Education: BS or MS in Electronic/VLSI Engineering or equivalent.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all.

With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands.

Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

Micron prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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Fuente: Jobrapido_Ppc

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